The present invention relates to an image composing and displaying apparatus for displaying a composite image in which video signals received from a television camera and/or a video tape recorder are displayed on a display screen presenting computer graphics of a workstation or the like.
By combining computer graphics with video signals to display a composite image on a screen according to a super-imposing technology and a multi-window system there can be obtained results applicable to a workstation which can be used in a multi-media presentation system and a remote electronic conference.
Heretofore, as described in the JP-A-2-222029 the system includes a video input section for inputting a video signal and converting the signal into digital image data, a first frame memory for storing therein the digital image data outputted from the video input section, a second frame memory for storing therein a signal outputted from the first frame memory or a still picture, a video signal output section for converting an output from the second frame memory into a video signal and outputting therefrom the video signal, a signal bus for inputting a still image to the second memory, and a central processing unit (CPU for controlling the operation of writing the output from the first frame memory or the still picture in the second frame memory.
In the constitution above, the input video signal is stored in the first frame memory such that stored image data is transferred to the second frame memory at a sufficiently high speed to guarantee a period of time for the CPU to write the still picture in the second frame memory.
According to the prior art above, the first and second frame memories are employed exclusively for the video signal input and output operations, respectively. Consequently, when a video signal is not displayed on the screen, the input dedicated frame memory is not used at all. Namely, there has not been considered any use thereof for other purposes. For example, the memory may be employed as the output dedicated frame memory.
Furthermore, a conventional example of the JPA-2-82758 will now be described.
FIG. 27 shows in a block diagram the configuration of the example, which includes raster buffers 200 and 202, a counter 204, a frame memory 206, and a write control section 208.
In the raster buffer 200 or 202, there is written input data at a timing synchronized with a data clock signal. The buffers 200 and 202 form a double buffer system. A change-over therebetween is activated at a predetermined interval of time according to a count accumulated in the counter 204 counting the data clock signal. While data is being inputted to one of the buffers, a raster of data, namely, data equivalent to a raster is outputted from the other buffer to the frame memory 206. The data write operation in the memory 206 is executed in synchronism with a display clock signal. The write control section 208 generates a write request signal WREQ with reference to a horizontal synchronizing signal HD to instruct the output of a raster from the frame memory 206.
FIG. 28 is a signal timing chart of the prior art example.
Input data is stored in the raster buffer 200 or 202 during a plurality of raster periods independently of the display clock signal and the horizontal synchronizing signal HD adopted as reference signals for the operation of the frame memory 206. When reading data from the buffer 200 or 202, the data is written in the frame memory 206, at a timing synchronized with the display clocks during a raster period instructed by the write request signal WREQ. According to the conventional example, data items successively inputted via a channel can be entirely written in the frame memory even when the data clock signal does not match the display clock signal.
In the prior art, data successively inputted via a channel can be stored in a frame memory. The consecutive input data includes, for example, video signals.
However, to conduct input and output operations of video signals via two or more channels, there is required other techniques, which have not been considered in the prior art.